Speed Up 112/224G Design with Clarity 3D Solver and Optimality Explorer.

Kezhou Li is a seasoned expert in electromagnetic simulation with over 15 years of experience. As a Director in Cadence’s System Design and Analysis (SDA) Group, Kezhou leads the Product Engineering and Verification Team in China. He has witnessed Cadence’s remarkable growth in the system simulation domain and plays a key role in shaping the roadmap for flagship tools in electronic simulation.

As cloud applications and large language models like GPT become increasingly widespread, network providers are compelled to upgrade transmission bandwidth, which requires advanced SerDes technology. The OIF organization initiated the CEI-224G project in 2020; if the 112G SerDes PAM4 scheme is adopted, the fundamental frequency reaches 56GHz, posing significant challenges for high-speed signal transmission across entire systems. Conventional design and simulation workflows often optimize individual components, but robust SerDes development at 112/224Gbps demands entire channel path analysis and system-level design optimization, accounting for all components' interactions. This presentation introduces how Cadence Clarity 3D Solver and Optimality Explorer efficiently enable global design and optimization for 112/224Gbps SerDes.